Pci Express
PCI Express ( Peripheral Component Interconnect Express ), officially abbreviated as PCIe (or PCI-E , as it is commonly called), is a computer expansion card standard designed to replace the older PCI, PCI-X, and AGP standards. PCIe 2.1 is the latest standard for expansion cards that is available on mainstream personal computers.
PCI Express is used in consumer, server, and industrial applications, as a motherboard-level interconnect (to link motherboard-mounted peripherals) and as an expansion card interface for add-in boards. A key difference between PCIe and earlier buses is a topology based on point-to-point serial links, rather than a shared parallel bus architecture.
The PCIe electrical interface is also used in a variety of other standards, most notably the ExpressCard laptop expansion card interface.
Conceptually, the PCIe bus can be thought of as a high-speed serial replacement of the older (parallel) PCI/PCI-X bus. At the software level, PCIe preserves compatibility with PCI; a PCIe device can be configured and used in legacy applications and operating systems which have no direct knowledge of PCIe's newer features. In terms of bus protocol, PCIe communication is encapsulated in packets. The work of packetizing and depacketizing data and status-message traffic is handled by the transaction layer of the PCIe port (described later). Radical differences in electrical signaling and bus protocol require the use of a different mechanical form factor and expansion connectors (and thus, new motherboards and new adapter boards).
Architecture
PCIe, unlike previous PC expansion standards, is structured around point-to-point serial links, a pair of which (one in each direction) make up lanes ; rather than a shared parallel bus. These lanes are routed by a hub on the main-board acting as a crossbar switch. This dynamic point-to-point behavior allows more than one pair of devices to communicate with each other at the same time. In contrast, older PC interfaces had all devices permanently wired to the same bus; therefore, only one device could send information at a time. This format also allows channel grouping , where multiple lanes are bonded to a single device pair in order to provide higher bandwidth.
The number of lanes is negotiated during power-up or explicitly during operation. By making the lane count flexible a single standard can provide for the needs of high-bandwidth cards (e.g., graphics cards, 10 Gigabit Ethernet cards and multiport Gigabit Ethernet cards) while also being economical for less demanding cards.
Unlike preceding PC expansion interface standards, PCIe is a network of point-to-point connections. This removes the need for arbitration of the bus or waiting for the bus to be free and allows for full duplex communications. This means that while standard PCI-X (133 MHz 64 bit) and PCIe ×4 have roughly the same data transfer rate, PCIe ×4 will give better performance if multiple device pairs are communicating simultaneously or if communication within a single device pair is bidirectional.
Specifications of the format are maintained and developed by the PCI-SIG (PCI Special Interest Group): a group of more than 900 companies that also maintain the Conventional PCI specifications.
Interconnect
PCIe devices communicate via a logical connection called an interconnect or link . A link is a point-to-point communication channel between 2 PCIe ports, allowing both to send/receive ordinary PCI-requests (configuration read/write, I/O read/write, memory read/write) and interrupts (INTx, MSI, MSI-X). At the physical level, a link is composed of 1 or more lanes ; low-speed peripherals (such as an 802.11 Wi-Fi card) use only a single-lane (×1) link, while a graphics-adapter typically uses a much wider (and thus faster) 16-lane link.
Lane
A lane is composed of a transmit and a receive pair of differential lines. Each lane is composed of 4 wires, meaning that, conceptually, each lane is a full-duplex byte stream, transporting packets containing the data in 8 bit 'byte' format, between the two endpoints of a link, in both directions simultaneously. Physical PCIe slots may contain from one to thirty-two lanes, in powers of two (1, 2, 4, 8, 16 and 32). Lane counts are written with an × prefix (e.g., ×16 represents a sixteen-lane card or slot), with ×16 being the largest size in common use.
Serial bus
The bonded serial format was chosen over a traditional parallel format due to the phenomenon of timing skew. Timing skew is a direct result of the limitations imposed by the speed of an electrical signal traveling down a wire, which it does at a finite speed. Because different traces in an interface have different lengths, parallel signals transmitted simultaneously from a source arrive at their destinations at different times. When the interconnection clock rate rises to the point where the wavelength of a single bit is less than this difference in path length, the bits of a single word do not arrive at their destination simultaneously, making parallel recovery of the word difficult. Thus, the speed of the electrical signal, combined with the difference in length between the longest and shortest trace in a parallel interconnect, leads to a naturally imposed maximum bandwidth. Serial channel bonding avoids this issue by not requiring the bits to arrive simultaneously. PCIe is just one example of a general trend away from parallel buses to serial interconnects. Other examples include Serial ATA, USB, SAS, FireWire and RapidIO. The multichannel serial design also increases flexibility by allowing slow devices to be allocated fewer lanes than fast devices.
Form factors
PCI Express (standard)
A PCIe card will fit into a slot of its physical size or bigger, but may not fit into a smaller PCIe slot. Some slots use open-ended sockets to permit physically longer cards and will negotiate the best available electrical connection. The number of lanes actually connected to a slot may also be less than the number supported by the physical slot size. An example is a x8 slot that actually only runs at ×1; these slots will allow any ×1, ×2, ×4 or ×8 card to be used, though only running at the ×1 speed. This type of socket is described as a ×8 (×1 mode) slot, meaning it physically accepts up to ×8 cards but only runs at ×1 speed. The advantage gained is that a larger range of PCIe cards can still be used without requiring the motherboard hardware to support the full transfer rate—in so doing keeping design and implementation costs down.
PCI Express Mini Card
PCI Express Mini Card (also known as Mini PCI Express, Mini PCIe, and Mini PCI-E) is a replacement for the Mini PCI form factor based on PCI Express. It is developed by the PCI-SIG. The host device supports both PCI Express and USB 2.0 connectivity, and each card uses whichever the designer feels most appropriate to the task. Most laptop computers built after 2005 are based on PCI Express and can have several Mini Card slots.
Physical dimensions
PCI Express Mini Cards are 30×50.95 mm. There is a 52 pin edge connector, consisting of two staggered rows on a 0.8 mm pitch. Each row has 8 contacts, a gap equivalent to 4 contacts, then a further 18 contacts. A half-length card is also specified 30×26.8 mm. Cards have a thickness of 1.0 mm (excluding components).
Electrical interface
PCI Express Mini Card edge connector provide multiple connections and buses:
- PCIe ×1
- USB 2.0
- SMBus
- Wires to diagnostics LEDs for wireless network (i.e., WiFi) status on computer's chassis
- SIM card for GSM and WCDMA applications
- Future extension for another PCIe lane
- 1.5 and 3.3 volt power
EeePC flash connector
Some netbooks (notably the Asus EeePC and Dell mini9) use a variant of the PCI Express Mini Card for flash or SSD. This variant uses the reserved and several non-reserved pins to implement SATA and IDE interface passthrough, keeping only USB, ground lines and maybe the core 1x bus intact. This makes the 'miniPCIe' flash and solid state drives sold for netbooks largely incompatible with true PCI Express Mini implementations. Also the typical Asus miniPCIe SSD is 71mm long, causing the Dell 51mm model often being (incorrectly) referred to as half length.
PCI Express External Cabling
PCI Express External Cabling (also known as External PCI Express or Cabled PCI Express ) specifications were released by the PCI-SIG in February 2007.
Standard cables and connectors have been defined for ×1, ×4, ×8, and ×16 link widths, with a transfer rate of 250 MB/s per lane. The PCI-SIG also expects the norm will evolve to reach the 500 MB/s as found in PCI Express 2.0. The maximum cable length hasn't been determined yet.